LBIST (Logic Built-in Self-Test) is used extensively within IBM to test for both DC and AC faults in the logic and some portions of the arrays. Published material about LBIST include IBM's Journal of Research and Development vol 41 number Jul./Sep. 4/5 1997 pages 611-627. It is the primary mechanism to test the chip logic and is used at all levels of test--chip, MCM and system and is incorporated herein.
The major components of LBIST are a PRPG (Pseudo-Random Pattern Generator) used to generate the test patterns, a MISR (Multiple Input Signature Register) to compress the test results and the STCM (Self-Test Control Macro) that is used to apply the clocks and controls to the PRPG, MISR and system logic to perform the test. The PRPG applies data to the system logic via multiple parallel scan chains which are connected between the PRPG and MISR.
A limitation of LBIST is the requirement that all system latch states must have a known, predictable value during LBIST as the latch states are compressed into the MISR to generate the result signature. If even 1 of the system latch states is unknown or intermittent, the MISR signature will be incorrect or intermittent and LBIST cannot be used to test the logic.
Problems can be discovered that cause intermittent latch states. Some of these problems can be due to early design problems or they can be caused by power supply noise or coupled noise related to physical design and process parameters. In either case, LBIST could not be used as an effective test of the logic. Also, LBIST is the key logic problem diagnosis tool and, once an intermittent problem is encountered, the prior version of LBIST becomes ineffective at any additional problem diagnosis.